VSync 924 Especificaciones Pagina 57

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Matrox Solios eCL/XCL acquisition section 57
Matrox Solios eCL/XCL-B
The following tables summarize the synchronization, timing, and control signals
supported by Matrox Solios eCL/XCL-B. For example, P0_TTL_AUX_IO_0 can
be defined as a timer output (M_TIMER3 on M_DEV0), trigger input (trigger
controller 0 on acq path 0), field polarity input, user input, or user output
(M_USER_BIT2) signal. CL connect. stands for Camera Link connector.
LVDS cam. ctrl
TTL aux. I/O
*
*. On auxiliary I/O connector (DBHD-15).
OPTO
aux.
in*
LVDS
aux.
in
*
LVDS
aux.
out
*
CL connect.
M_AUX_IOn
†. MIL constant, where n and m correspond to the number in the row.
n
892671011
12
M_CC_IOm
m
1234
Functionality
Acquisition Path
CC1
CC2
CC3
CC4
P0_TTL_AUX_IO_0
P0_TTL_AUX_IO_1
‡. Not available when the DBHD-15 auxiliary I/O connector is replaced with the optional DB-9 connector from
the SOLCLBACCxxPAK accessory kit.
P0_TTL_AUX_IO_2
P0_OPTO_AUX_IN0
P0_OPTO_AUX_IN1
P0_LVDS_AUX_IN0
P0_LVDS_AUX_IN1
P0_LVDS_AUX_OUT0
Timer
(M_TIMERn
)
0 1/2 1/2 1/2 1/2 3 1/4 2 1
Trigger controller affected
by input signal
0 T0T1T2T0T1T0T1
Field polarity input 1000
Timer-clock input 10
Bit of quadrature input
**
**. Note that a rotary encoder with quadrature output transmits a two-bit code. The table entries 0 and 1, there-
fore, denote bit position.
101
User output (bit of
Camera Link
static-user-output register
M_USER_BIT_CC_IOn
)
0 0/1 0/1 0/1 0/1
User output (bit of main
static-user-output register
M_USER_BITn
)
0 234 0
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